The Future of High Performance Memory!

Rambus India Design Seminars

The Future of High Performance Memory Designs

21 February 2008 | The Leela Palace Kempinski Bangalore | Bangalore, India

In this seminar, we will explore the types of memory systems required for next generation consumer applications and discuss how these advanced memory systems will solve tomorrow's system challenges. We will discuss innovative techniques developed by Rambus to improve memory performance and reduce overall system costs, as well as analyze solutions to multi-GHz memory designs. Finally, we will unveil the newest development from Rambus, the Terabyte Bandwidth Initiative, which enables 1 TB/s of memory bandwidth performance into a single SoC.

There is no cost for this seminar, but you must register to attend. Sign up early, as space is limited.


Who should attend?
Anyone who designs or manufactures digital consumer electronic systems or memory subsystems, including:

	System Designers
	System Manufacturing Engineers
	Chip Architects
	Technical Managers
	Product Marketing

Agenda

9:30 – 10:00		Registration
10:00 – 10:05		Introduction
10:05 – 11:00		Evolution of Memory
11:00 – 12:15		XDR™/XDR2 and Memory Requirements for Next Generation Consumer Products
12:15 – 13:30		Lunch and Product Demonstrations
12:30 – 14:15		Solving System Engineering Challenges in High Speed Memory Designs
14:15 – 15:00		DDR2/DDR3 Bimodal Controller Design
15:00 – 15:15		Break
15:15 – 16:00		Terabyte Bandwidth Initiative

Demonstrations and Q&A
Technical experts from Rambus will conduct demonstrations and answer questions at the end of the main session. Lunch will be provided to all attendees, and Rambus experts will be available during the lunch hour to answer questions.

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